Documents

  • Neat2018

    Accepted author manuscript, 648 KB, PDF-document

DOI

Along with exciting visions for 5G communications and the Tactile Internet, the networking requirement of attaining extremely low end-to-end latency has appeared. While network devices are typically equipped with buffers to counteract packet loss caused by short-lived traffic bursts, the more those buffers get filled, the more delay is added to every packet passing through.

In this paper, we develop congestion avoidance methods that harness the power of fully programmable data-planes. The corresponding programmable switches, through languages such as P4, can be programmed to gather and react to important packet meta-data, such as queue load, while the data packets are being processed. In particular, we enable P4 switches to (1) track processing and queuing delays of latency-critical flows and (2) react immediately in the data-plane to congestion by rerouting the affected flows. Through a proof-of-concept implementation in emulation and on real hardware, we demonstrate that a data-plane approach reduces average and maximum delay, as well as jitter, when compared to non-programmable approaches.
Original languageEnglish
Title of host publicationNEAT'18
Subtitle of host publicationProceedings of the 2018 Workshop on Networking for Emerging Applications and Technologies
Place of PublicationNew York, NY
PublisherAssociation for Computing Machinery (ACM)
Pages45-51
ISBN (Print)978-1-4503-5907-8
DOIs
Publication statusPublished - 1 Aug 2018
EventNEAT 2018: The 2018 Workshop on Networking for Emerging Applications and Technologies - Budapest, Hungary
Duration: 20 Aug 201820 Aug 2018

Workshop

WorkshopNEAT 2018
CountryHungary
CityBudapest
Period20/08/1820/08/18

    Research areas

  • Low latency, Programmable data-planes, Tactile Internet, 5G

ID: 52026842