Abstract
Perhaps the greatest challenge facing quantum computing hardware development is the lack of a high throughput electrical characterization infrastructure at the cryogenic temperatures required for qubit measurements. In this article, we discuss our efforts to develop such a line to guide 300mm spin qubit process development. This includes (i) working with our supply chain to create the required cryogenic high volume testing ecosystem, (ii) driving full wafer cryogenic testing for both transistor and quantum dot statistics, and (iii) utilizing this line to develop a quantum dot process resulting in key electrical data comparable to that from leading devices in literature, but with unprecedented yield and reproducibility.
Original language | English |
---|---|
Title of host publication | 2019 IEEE International Electron Devices Meeting, IEDM 2019 |
Publisher | Institute of Electrical and Electronics Engineers (IEEE) |
Number of pages | 4 |
Volume | 2019-December |
ISBN (Electronic) | 9781728140315 |
DOIs | |
Publication status | Published - 2019 |
Event | 65th Annual IEEE International Electron Devices Meeting, IEDM 2019 - San Francisco, United States Duration: 7 Dec 2019 → 11 Dec 2019 |
Conference
Conference | 65th Annual IEEE International Electron Devices Meeting, IEDM 2019 |
---|---|
Country/Territory | United States |
City | San Francisco |
Period | 7/12/19 → 11/12/19 |