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DOI

Perhaps the greatest challenge facing quantum computing hardware development is the lack of a high throughput electrical characterization infrastructure at the cryogenic temperatures required for qubit measurements. In this article, we discuss our efforts to develop such a line to guide 300mm spin qubit process development. This includes (i) working with our supply chain to create the required cryogenic high volume testing ecosystem, (ii) driving full wafer cryogenic testing for both transistor and quantum dot statistics, and (iii) utilizing this line to develop a quantum dot process resulting in key electrical data comparable to that from leading devices in literature, but with unprecedented yield and reproducibility.

Original languageEnglish
Title of host publication2019 IEEE International Electron Devices Meeting, IEDM 2019
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Number of pages4
Volume2019-December
ISBN (Electronic)9781728140315
DOIs
Publication statusPublished - 2019
Event65th Annual IEEE International Electron Devices Meeting, IEDM 2019 - San Francisco, United States
Duration: 7 Dec 201911 Dec 2019

Conference

Conference65th Annual IEEE International Electron Devices Meeting, IEDM 2019
CountryUnited States
CitySan Francisco
Period7/12/1911/12/19

ID: 72219173