Abstract
We present a high-performance back-illuminated three-dimensional stacked single-photon avalanche diode (SPAD), which is implemented in 45-nm CMOS technology for the first time. The SPAD is based on a P+/Deep N-well junction with a circular shape, for which N-well is intentionally excluded to achieve a wide depletion region, thus enabling lower tunneling noise and better timing jitter as well as a higher photon detection efficiency and a wider spectrum. In order to prevent premature edge breakdown, a P-type guard ring is formed at the edge of the junction, and it is optimized to achieve a wider photon-sensitive area. In addition, metal-1 is used as a light reflector to improve the detection efficiency further in backside illumination. With the optimized 3-D stacked 45-nm CMOS technology for back-illuminated image sensors, the proposed SPAD achieves a dark count rate of 55.4 cps/μm2 and a photon detection probability of 31.8% at 600 nm and over 5% in the 420-920 nm wavelength range. The jitter is 107.7 ps full width at half-maximum with negligible exponential diffusion tail at 2.5 V excess bias voltage at room temperature. To the best of our knowledge, these are the best results ever reported for any back-illuminated 3-D stacked SPAD technologies.
Original language | English |
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Article number | 8338386 |
Pages (from-to) | 1-9 |
Number of pages | 9 |
Journal | IEEE Journal of Selected Topics in Quantum Electronics |
Volume | 24 |
Issue number | 6 |
DOIs | |
Publication status | Published - 2018 |
Keywords
- Avalanche photodiode (APD)
- CMOS image sensor
- detector
- Geiger-mode avalanche photodiode (G-APD)
- image sensor
- integrated optics device
- integrated photonics
- light detection and ranging (LiDAR)
- low light level
- optical sensor
- photodiode
- photomultiplier
- photon counting
- photon timing
- semiconductor
- sensor
- silicon
- single-photon avalanche diode (SPAD)
- single-photon imaging
- standard CMOS technology
- three-dimensional fabrication
- three-dimensional vision