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Mapping of Lattice Surgery-based Quantum Circuits on Surface Code Architectures. / Lao, L.; van Wee, B.; Ashraf, Imran; van Someren, J.; Khammassi, N.; Bertels, K.; Almudever, C.G.

In: Quantum Science and Technology, Vol. 4, No. 1, 015005, 2019, p. 1-20.

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Lao, L. ; van Wee, B. ; Ashraf, Imran ; van Someren, J. ; Khammassi, N. ; Bertels, K. ; Almudever, C.G. / Mapping of Lattice Surgery-based Quantum Circuits on Surface Code Architectures. In: Quantum Science and Technology. 2019 ; Vol. 4, No. 1. pp. 1-20.

BibTeX

@article{d3879450c2ac4478bdb46c728b351dd0,
title = "Mapping of Lattice Surgery-based Quantum Circuits on Surface Code Architectures",
abstract = "Quantum error correction (QEC) and fault-tolerant (FT) mechanisms are essential for reliable quantum computing. However, QEC considerably increases the computation size up to four orders of magnitude. Moreover, FT implementation has specific requirements on qubit layouts, causing both resource and time overhead. Reducing spatial-temporal costs becomes critical since it is beneficial to decrease the failure rate of quantum computation. To this purpose, scalable qubit plane architectures and efficient mapping passes including placement and routing of qubits as well as scheduling of operations are needed. This paper proposes a full mapping process to execute lattice surgery-based quantum circuits on two surface code architectures, namely a checkerboard and a tile-based one. We show that the checkerboard architecture is 2x qubit-efficient but the tile-based one requires lower communication overhead in terms of both operation overhead (up to 86{\%}) and latency overhead (up to 79{\%}).",
keywords = "lattice surgery, operation scheduling, quantum computing, qubit placement and routing, qubit plane architecture, surface code",
author = "L. Lao and {van Wee}, B. and Imran Ashraf and {van Someren}, J. and N. Khammassi and K. Bertels and C.G. Almudever",
note = "Accepted author manuscript",
year = "2019",
doi = "10.1088/2058-9565/aadd1a",
language = "English",
volume = "4",
pages = "1--20",
journal = "Quantum Science and Technology",
issn = "2058-9565",
publisher = "The Institute of Physics Publishing",
number = "1",

}

RIS

TY - JOUR

T1 - Mapping of Lattice Surgery-based Quantum Circuits on Surface Code Architectures

AU - Lao, L.

AU - van Wee, B.

AU - Ashraf, Imran

AU - van Someren, J.

AU - Khammassi, N.

AU - Bertels, K.

AU - Almudever, C.G.

N1 - Accepted author manuscript

PY - 2019

Y1 - 2019

N2 - Quantum error correction (QEC) and fault-tolerant (FT) mechanisms are essential for reliable quantum computing. However, QEC considerably increases the computation size up to four orders of magnitude. Moreover, FT implementation has specific requirements on qubit layouts, causing both resource and time overhead. Reducing spatial-temporal costs becomes critical since it is beneficial to decrease the failure rate of quantum computation. To this purpose, scalable qubit plane architectures and efficient mapping passes including placement and routing of qubits as well as scheduling of operations are needed. This paper proposes a full mapping process to execute lattice surgery-based quantum circuits on two surface code architectures, namely a checkerboard and a tile-based one. We show that the checkerboard architecture is 2x qubit-efficient but the tile-based one requires lower communication overhead in terms of both operation overhead (up to 86%) and latency overhead (up to 79%).

AB - Quantum error correction (QEC) and fault-tolerant (FT) mechanisms are essential for reliable quantum computing. However, QEC considerably increases the computation size up to four orders of magnitude. Moreover, FT implementation has specific requirements on qubit layouts, causing both resource and time overhead. Reducing spatial-temporal costs becomes critical since it is beneficial to decrease the failure rate of quantum computation. To this purpose, scalable qubit plane architectures and efficient mapping passes including placement and routing of qubits as well as scheduling of operations are needed. This paper proposes a full mapping process to execute lattice surgery-based quantum circuits on two surface code architectures, namely a checkerboard and a tile-based one. We show that the checkerboard architecture is 2x qubit-efficient but the tile-based one requires lower communication overhead in terms of both operation overhead (up to 86%) and latency overhead (up to 79%).

KW - lattice surgery

KW - operation scheduling

KW - quantum computing

KW - qubit placement and routing

KW - qubit plane architecture

KW - surface code

UR - http://www.scopus.com/inward/record.url?scp=85060147488&partnerID=8YFLogxK

U2 - 10.1088/2058-9565/aadd1a

DO - 10.1088/2058-9565/aadd1a

M3 - Article

VL - 4

SP - 1

EP - 20

JO - Quantum Science and Technology

T2 - Quantum Science and Technology

JF - Quantum Science and Technology

SN - 2058-9565

IS - 1

M1 - 015005

ER -

ID: 56195288