Multi-Scale Material and Technology for Heterogeneous Integration

This thesis describes a series of experiments and fabrication methods on high-aspect-ratio 3D microstructures for wafer level packaging and 3D heterogeneous system integration (3D-HSI) using novel materials such as carbon nanotubes and thick-film photo-resists. Furthermore, theoretical and experimental research efforts are made to understand the mechanical material behaviour when scaling down towards the nanometer scale. Heterogeneous system integration combines different silicon dies and materials into a single microelectronic package. It enables cost effective and reliable approaches to achieve more functionality (“More than Moore”) and minimization of geometric size and power consumption. Vertical Interconnect Access (VIAs) are key for 3D system integration, leading towards smaller systems and shorter overall interconnect length.