DOI

The Pauli frame mechanism allows Pauli gates to be tracked in classical electronics and can relax the timing constraints for error syndrome measurement and error decoding. When building a quantum computer, such a mechanism may be beneficial, and the goal of this paper is not only to study the working principles of a Pauli frame but also to quantify its potential effect on the logical error rate. To this purpose, we implemented and simulated the Pauli frame module which, in principle, can be directly mapped into a hardware implementation. Simulation of a surface code 17 logical qubit has shown that a Pauli frame can reduce the error rate of a logical qubit up to 70% compared to the same logical qubit without Pauli frame when the decoding time equals the error correction time, and maximum parallelism can be obtained.

Original languageEnglish
Title of host publicationProceedings of the 54th Annual Design Automation Conference 2017, DAC 2017
EditorsRobert Aitken, Zhuo Li
Place of PublicationNew York
PublisherAssociation for Computing Machinery (ACM)
Pages1-6
ISBN (Electronic)978-1-4503-4927-7
DOIs
Publication statusPublished - 2017
Event54th Annual Design Automation Conference, DAC 2017 - Austin, United States
Duration: 18 Jun 201722 Jun 2017

Conference

Conference54th Annual Design Automation Conference, DAC 2017
CountryUnited States
CityAustin
Period18/06/1722/06/17

    Research areas

  • Quantum Computer (Micro)Architecture, Pauli Frames

ID: 36830492