Power-Efficient Accelerated Genomic Short Read Mapping on Heterogeneous Computing Platforms

Ernst Houtgast; Vlad Sima; Giacomo Marchiori; Koen Bertels; Zaid Al-Ars

doi:10.1109/FCCM.2016.17

Power-Efficient Accelerated Genomic Short Read Mapping on Heterogeneous Computing Platforms

Ernst Houtgast, Vlad Sima, Giacomo Marchiori, Koen Bertels, Zaid Al-Ars

Research output: Contribution to conference › Abstract › Scientific

1 Citation (Scopus)

Abstract

We propose a novel FPGA-accelerated BWA-MEM implementation, a popular tool for genomic data mapping. The performance and power-efficiency of the FPGA implementation on the single Xilinx Virtex-7 Alpha Data add-in card is compared
against a software-only baseline system. By offloading the Seed Extension phase onto the FPGA, a two-fold speedup in overall application-level performance is achieved and a 1.6x gain in power-efficiency. To facilitate platform and tool-agnostic comparisons, the base pairs per Joule unit is introduced as a measure of power-efficiency. The FPGA design is able to map up to 34 thousand base pairs per Joule.

Original language	English
Pages	1-1
Number of pages	1
DOIs	https://doi.org/10.1109/FCCM.2016.17
Publication status	Published - 2016
Event	24th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2016 - Washington DC, United States Duration: 1 May 2016 → 3 May 2016

Conference

Conference	24th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2016
Abbreviated title	FCCM 2016
Country/Territory	United States
City	Washington DC
Period	1/05/16 → 3/05/16

Keywords

read mapping
FPGA
power-efficiency

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10.1109/FCCM.2016.17

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title = "Power-Efficient Accelerated Genomic Short Read Mapping on Heterogeneous Computing Platforms",

abstract = "We propose a novel FPGA-accelerated BWA-MEM implementation, a popular tool for genomic data mapping. The performance and power-efficiency of the FPGA implementation on the single Xilinx Virtex-7 Alpha Data add-in card is comparedagainst a software-only baseline system. By offloading the Seed Extension phase onto the FPGA, a two-fold speedup in overall application-level performance is achieved and a 1.6x gain in power-efficiency. To facilitate platform and tool-agnostic comparisons, the base pairs per Joule unit is introduced as a measure of power-efficiency. The FPGA design is able to map up to 34 thousand base pairs per Joule.",

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author = "Ernst Houtgast and Vlad Sima and Giacomo Marchiori and Koen Bertels and Zaid Al-Ars",

year = "2016",

doi = "10.1109/FCCM.2016.17",

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note = "24th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2016, FCCM 2016 ; Conference date: 01-05-2016 Through 03-05-2016",

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T1 - Power-Efficient Accelerated Genomic Short Read Mapping on Heterogeneous Computing Platforms

AU - Houtgast, Ernst

AU - Sima, Vlad

AU - Marchiori, Giacomo

AU - Bertels, Koen

AU - Al-Ars, Zaid

PY - 2016

Y1 - 2016

N2 - We propose a novel FPGA-accelerated BWA-MEM implementation, a popular tool for genomic data mapping. The performance and power-efficiency of the FPGA implementation on the single Xilinx Virtex-7 Alpha Data add-in card is comparedagainst a software-only baseline system. By offloading the Seed Extension phase onto the FPGA, a two-fold speedup in overall application-level performance is achieved and a 1.6x gain in power-efficiency. To facilitate platform and tool-agnostic comparisons, the base pairs per Joule unit is introduced as a measure of power-efficiency. The FPGA design is able to map up to 34 thousand base pairs per Joule.

AB - We propose a novel FPGA-accelerated BWA-MEM implementation, a popular tool for genomic data mapping. The performance and power-efficiency of the FPGA implementation on the single Xilinx Virtex-7 Alpha Data add-in card is comparedagainst a software-only baseline system. By offloading the Seed Extension phase onto the FPGA, a two-fold speedup in overall application-level performance is achieved and a 1.6x gain in power-efficiency. To facilitate platform and tool-agnostic comparisons, the base pairs per Joule unit is introduced as a measure of power-efficiency. The FPGA design is able to map up to 34 thousand base pairs per Joule.

KW - read mapping

KW - FPGA

KW - power-efficiency

U2 - 10.1109/FCCM.2016.17

DO - 10.1109/FCCM.2016.17

M3 - Abstract

SP - 1

EP - 1

T2 - 24th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2016

Y2 - 1 May 2016 through 3 May 2016

ER -

Power-Efficient Accelerated Genomic Short Read Mapping on Heterogeneous Computing Platforms

Abstract

Conference

Keywords

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