Quality versus cost analysis for 3D Stacked ICs

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

6 Citations (Scopus)

Original language	English
Title of host publication	Proceedings - 32nd IEEE VLSI Test Symposium
Editors	C Thibeault
Place of Publication	Los Alamitos, CA, USA
Publisher	IEEE
Pages	1-6
Number of pages	6
ISBN (Print)	978-1-4799-2611-4
DOIs	https://doi.org/10.1109/VTS.2014.6818763
Publication status	Published - 2014
Event	VTS 2014, Napa, CA, USA - Los Alamitos, CA, USA Duration: 13 Apr 2014 → 17 Apr 2014

Name
Publisher	IEEE Computer Society

Conference	VTS 2014, Napa, CA, USA
Period	13/04/14 → 17/04/14

Access to Document

@inproceedings{318f55d96ca14e16a6010e828f3a44de,

title = "Quality versus cost analysis for 3D Stacked ICs",

author = "M Taouil and S Hamdioui and EJ Marinissen",

year = "2014",

doi = "10.1109/VTS.2014.6818763",

language = "English",

isbn = "978-1-4799-2611-4",

publisher = "IEEE",

pages = "1--6",

editor = "C Thibeault",

booktitle = "Proceedings - 32nd IEEE VLSI Test Symposium",

address = "United States",

note = "VTS 2014, Napa, CA, USA ; Conference date: 13-04-2014 Through 17-04-2014",

}

TY - GEN

T1 - Quality versus cost analysis for 3D Stacked ICs

AU - Taouil, M

AU - Hamdioui, S

AU - Marinissen, EJ

PY - 2014

Y1 - 2014

U2 - 10.1109/VTS.2014.6818763

DO - 10.1109/VTS.2014.6818763

M3 - Conference contribution

SN - 978-1-4799-2611-4

SP - 1

EP - 6

BT - Proceedings - 32nd IEEE VLSI Test Symposium

A2 - Thibeault, C

PB - IEEE

CY - Los Alamitos, CA, USA

T2 - VTS 2014, Napa, CA, USA

Y2 - 13 April 2014 through 17 April 2014

ER -