Realistic fault models and test procedure for multi-port SRAMs

S Hamdioui, AJ van de Goor, D Eastwick, M Rodgers

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

4 Citations (Scopus)

Original language	Undefined/Unknown
Title of host publication	Proceedings
Place of Publication	Los Alamitos
Publisher	IEEE
Pages	65-72
Number of pages	8
ISBN (Print)	0-7695-1242-9
Publication status	Published - 2001
Event	2001 IEEE International Workshop on Memory Technology, Design and Testing, San Jose - Los Alamitos Duration: 6 Aug 2001 → 7 Aug 2001

Name
Publisher	IEEE Computer Society

Conference	2001 IEEE International Workshop on Memory Technology, Design and Testing, San Jose
Period	6/08/01 → 7/08/01

Keywords

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title = "Realistic fault models and test procedure for multi-port SRAMs",

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author = "S Hamdioui and {van de Goor}, AJ and D Eastwick and M Rodgers",

year = "2001",

language = "Undefined/Unknown",

isbn = "0-7695-1242-9",

publisher = "IEEE",

pages = "65--72",

booktitle = "Proceedings",

address = "United States",

note = "2001 IEEE International Workshop on Memory Technology, Design and Testing, San Jose ; Conference date: 06-08-2001 Through 07-08-2001",

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TY - GEN

T1 - Realistic fault models and test procedure for multi-port SRAMs

AU - Hamdioui, S

AU - van de Goor, AJ

AU - Eastwick, D

AU - Rodgers, M

PY - 2001

Y1 - 2001

KW - ZX Int.klas.verslagjaar < 2002

M3 - Conference contribution

SN - 0-7695-1242-9

SP - 65

EP - 72

BT - Proceedings

PB - IEEE

CY - Los Alamitos

T2 - 2001 IEEE International Workshop on Memory Technology, Design and Testing, San Jose

Y2 - 6 August 2001 through 7 August 2001

ER -