• 08869891

    Accepted author manuscript, 5.56 MB, PDF document


SiC devices are promising for outperforming Si counterparts in high-frequency applications due to its superior material properties. Conventional wirebonded packaging scheme has been one of the most preferred package structures for power modules. However, the technique limits the performance of a SiC power module due to parasitic inductance and heat dissipation issues that are inherent with aluminum wires. In this article, low parasitic inductance and high-efficient cooling interconnection techniques for Si power modules, which are the foundation of packaging methods of SiC ones, are reviewed first. Then, attempts on developing packaging techniques for SiC power modules are thoroughly overviewed. Finally, scientific challenges in the packaging of SiC power module are summarized.

Original languageEnglish
Article number8869891
Pages (from-to)223-238
Number of pages16
JournalIEEE Journal of Emerging and Selected Topics in Power Electronics
Issue number1
Publication statusPublished - 1 Mar 2020

    Research areas

  • High-efficient cooling, low parasitic inductance, packaging schemes, scientific challenges, SiC power module

ID: 70167738