DOI

Memristor technology is a promising alternative to CMOS due to its high integration density, near-zero standby power, and ability to implement novel resistive computing. One of the major limitations of these architectures is the limited endurance of memristor devices, especially when a logic gate requires multiple steps/switching to execute the logic operations. To alleviate the endurance requirement and improve the performance, we present a novel logic design style, called scouting logic that executes any logic gate by only reading the memristor devices and without changing their states. Hence, no impact on the memristors' endurance. The proposed design is implemented using two styles (current and voltage based). To illustrate the performance of scouting logic based designs, the area, delay, and power consumption are analyzed and compared with state-ofthe- art. The results show that scouting logic improves the delay and power consumption by at least a factor of 2.3, while having similar or less area overhead. Finally, we discuss the potential applications and challenges of scouting logic.
Original languageEnglish
Title of host publication2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
EditorsM. Hübner , R. Reis, M. Stan, N. Voros
Place of Publication Piscataway
PublisherIEEE
Pages176-181
Number of pages6
ISBN (Electronic)978-1-5090-6762-6
ISBN (Print)978-1-5090-6763-3
DOIs
Publication statusPublished - 2017
Event2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) - Bochum, Germany
Duration: 3 Jul 20175 Jul 2017

Conference

Conference2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
CountryGermany
CityBochum
Period3/07/175/07/17

    Research areas

  • Memristor, Logic, Scouting

ID: 32863175