Stacking Order Impact on Overall 3D Die-to-Wafer Stacked-IC Cost

Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

6 Citations (Scopus)
Original languageEnglish
Title of host publicationIEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems
EditorsR Kraemer, A Steininger, A Pawlak, et al.
Place of PublicationPiscataway, NJ, USA
PublisherIEEE Society
Pages335-340
Number of pages6
ISBN (Print)978-1-4244-9756-0
DOIs
Publication statusPublished - 2011
EventDDECS 2011 - Piscataway, NJ, USA
Duration: 13 Apr 201114 Apr 2011

Publication series

Name
PublisherIEEE

Conference

ConferenceDDECS 2011
Period13/04/1114/04/11

Keywords

  • Conf.proc. > 3 pag

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