Documents

  • 9021358

    Accepted author manuscript, 2 MB, PDF-document

This paper presents the concept of a fidelity slider, which is a user-defined method that enables trading off accuracy for performance in a parallelized application. The slider is defined in the context of the Canny edge detector, but can be generalized to other image processing algorithms. The slider moderates discontinuity issues introduced by an image-slicing technique used to increase the level of the parallelism in the Canny edge algorithm, and allows for strong scalability across multiple cores. The domain decomposition-based technique used by our method is a toplevel image-slicing loop incorporated into the algorithm to process segments of an image concurrently. The slider controls three factors to moderate the aggregate output data divergence induced
by the parallelized Canny edge algorithm: 1. image slice overlap size, 2. the degree of histogram synchronization, and 3. the edge tracing continuity factor. Results show that the fidelity slider is able to control the tradeoff from a speedup of 7x at 100% accuracy up to a speedup of 19x at 99% accuracy, for an image of 8000x8000 pixels processed on an Intel Xeon platform with 14 cores and 28 hardware threads.
Original languageEnglish
Title of host publication11th HiPEAC conference
Pages1-6
Number of pages6
Publication statusPublished - 2016
EventHiPEAC 2016 - Prague, Czech Republic
Duration: 18 Jan 201620 Jan 2016

Conference

ConferenceHiPEAC 2016
CountryCzech Republic
CityPrague
Period18/01/1620/01/16

ID: 9021358