DOI

  • Johanna Sepulveda
  • Cezar Reinbrecht
  • Siavoosh Payandeh Azad
  • Behrad Niazmand
  • Gert Jervan

Multi-Processor Systems-on-Chips (MPSoCs) are the key enabler technology for current and future applications. However, the high on-chip connectivity, the programmability and IPs reusability, also introduce security concerns. Problems arise when applications with different trust and security levels share the MPSoC resources. One of the potent threats that MPSoCs see themselves exposed to are the so-called side-channel attacks (SCA). In this work, we explore the cache-based side-channel attacks optimized by the communication structure. We evaluate the vulnerability of the different NoC-based MPSoC memory configuration against micro-architectural side channel attacks. Our attack targets an MPSoC AES T-Table implementation. We explore the impact of the MPSoC organization on the NoC timing attack. We present the huge impact on the memory organization and present two attack metrics: efficacy and efficiency. Our results show that NoC-based MPSoCs are vulnerable and that deep memory hierarchies favor the security of the system.

Original languageEnglish
Title of host publicationProceedings - 2018 International Conference on Embedded Computer Systems
Subtitle of host publicationArchitectures, Modeling and Simulation, SAMOS 2018
EditorsTrevor Mudge, Dionisios N. Pnevmatikatos
Place of PublicationNew York
PublisherAssociation for Computing Machinery (ACM)
Pages162-166
Number of pages5
ISBN (Electronic)978-145036494-2
DOIs
Publication statusPublished - 15 Jul 2018
EventSAMOS 2018: 18th Annual International conference on Embedded Computer Systems: Architectures, MOdeling and Simulation, - Samos, Greece
Duration: 15 Jul 201819 Jul 2018

Conference

ConferenceSAMOS 2018: 18th Annual International conference on Embedded Computer Systems: Architectures, MOdeling and Simulation,
Abbreviated titleSAMOS 2018
CountryGreece
CitySamos
Period15/07/1819/07/18

ID: 53104922