Abstract
This work aims at an alternative method to verify the correctness of Fault Lists generated by fault simulators tools in context of safety verification. The lists generated by simulation tools are verified against lists from formal tools. The consistency evaluation between the lists supports the Tool Confidence Level (TCL) assessment, defined in the ISO26262. In addition, formal tools have the potential of performing optimization in Fault Lists by annotation of the expected behavior of the design under fault. Our work demonstrates the feasibility of using Formal Methods to verify and optimize the fault list from simulators. Results indicate an average reduction of 29.5% on the number of faults to be simulated and demonstrate that it is possible to achieve TCL by verification of the fault lists.
| Original language | English |
|---|---|
| Title of host publication | DVCon Europe 2018 |
| Pages | 1-6 |
| Number of pages | 6 |
| Publication status | Published - 2018 |
| Event | DVCon Europe 2018: Design and Verification Conference and Exhibition Europe - Holiday Inn Munich City Centre, Munich, Germany Duration: 24 Oct 2018 → 25 Oct 2018 |
Conference
| Conference | DVCon Europe 2018 |
|---|---|
| Country/Territory | Germany |
| City | Munich |
| Period | 24/10/18 → 25/10/18 |
Bibliographical note
Secure hardwareKeywords
- ISO26262
- Fault Injection
- Formal
- Simulation
- Tool Qualification