@inproceedings{1ab2fc93e27547c39b0c313bf541919e,
title = "VLIW-Based FPGA Computation Fabric with Streaming Memory Hierarchy for Medical Imaging Applications",
abstract = "In this paper, we present and evaluate an FPGA acceleration fabric that uses VLIW softcores as processing elements, combined with amemory hierarchy that is designed to stream data between intermediate stages of an image processing pipeline. These pipelines are commonplace in medical applications such as X-ray imagers. By using a streaming memory hierarchy, performance is increased by a factor that depends on the number of stages (7.5× when using 4 consecutive filters). Using a Xilinx VC707 board, we are able to place up to 75 cores. A platform of 64 cores can be routed at 193 MHz, achieving real-time performance, while keeping 20% resources available for off-board interfacing. Our VHDL implementation and associated tools (compiler, simulator, etc.) are available for download for the academic community.",
author = "Joost Hoozemans and R. Heij and {van Straten}, Jeroen and Zaid Al-Ars",
year = "2017",
doi = "10.1007/978-3-319-56258-2_4",
language = "English",
isbn = "978-3-319-56257-5",
series = "Lecture Notes in Computer Science",
publisher = "Springer",
pages = "36--43",
editor = "S. Wong and A.C. Beck and K. Bertels and L. Carro",
booktitle = "Applied Reconfigurable Computing",
note = "ARC 2017: Applied Reconfigurable Computing : 13th International Symposium on Applied Reconfigurable Computing ; Conference date: 03-04-2017 Through 07-04-2017",
}