TY - GEN
T1 - Voltage References for the Ultra-Wide Temperature Range from 4.2K to 300K in 40-nm CMOS
AU - Van Staveren, J.
AU - Garcia Almudever, C.
AU - Scappucci, G.
AU - Veldhorst, M.
AU - Babaie, M.
AU - Charbon, E.
AU - Sebastiano, F.
PY - 2019/9/1
Y1 - 2019/9/1
N2 - This paper presents a family of voltage references in standard 40-nm CMOS that exploits the temperature dependence of dynamic-threshold MOS,NMOS and PMOS transistors in weak inversion to enable operation over the ultra-wide temperature range from 4.2 K to 300 K. The proposed references achieve a temperature drift below 436 ppm/K over a statistically significant number of samples after a single-point trim and a supply regulation better than 1.7 %/V from a a supply as low as 0.99 V. These results demonstrate,for the first time,the generation of PVT-independent voltages over an ultra-wide temperature range using sub-1-V nanometer CMOS circuits,thus enabling the use of the proposed references in harsh environments,such as in space and quantum-computing applications.
AB - This paper presents a family of voltage references in standard 40-nm CMOS that exploits the temperature dependence of dynamic-threshold MOS,NMOS and PMOS transistors in weak inversion to enable operation over the ultra-wide temperature range from 4.2 K to 300 K. The proposed references achieve a temperature drift below 436 ppm/K over a statistically significant number of samples after a single-point trim and a supply regulation better than 1.7 %/V from a a supply as low as 0.99 V. These results demonstrate,for the first time,the generation of PVT-independent voltages over an ultra-wide temperature range using sub-1-V nanometer CMOS circuits,thus enabling the use of the proposed references in harsh environments,such as in space and quantum-computing applications.
UR - http://www.scopus.com/inward/record.url?scp=85075949922&partnerID=8YFLogxK
U2 - 10.1109/ESSCIRC.2019.8902861
DO - 10.1109/ESSCIRC.2019.8902861
M3 - Conference contribution
T3 - ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference
SP - 37
EP - 40
BT - ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference
PB - Institute of Electrical and Electronics Engineers (IEEE)
T2 - 45th IEEE European Solid State Circuits Conference, ESSCIRC 2019
Y2 - 23 September 2019 through 26 September 2019
ER -